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Registration: 29.04.2025
Joel Law
Specialization: Electronic Design Engineer
Skills
Digital Electronics
CAD
MATLAB
VHDL
PCB Design
Verilog
ETAP
Work experience
Divisional Signal/Telecom Engineer
03.2019 - 01.2025 |Patton Electronics
VHDL, Verilog, FPGA, ASIC, Cadence
Senior Electrical/Electronic Design Engineer
03.2019 - 07.2023 |NDA
VHDL, Verilog, FPGA, ASIC, Cadence
Electronic Design Engineer
10.2011 - 02.2019 |EmblePCB
Hyperlynx
Educational background
Electrical and Electronics Engineering (Bachelor’s Degree)
2008 - 2011
Capitol Technology University
Languages
EnglishIntermediate